We’re looking for a Senior Compiler Engineer to join a team developing a compiler toolchain for programmable networking hardware used in high-performance data centers.
The platform turns specialized networking devices into programmable systems, translating high-level code into hardware-executable instructions while accounting for strict resource and performance constraints. You’ll work at the intersection of compiler engineering, systems programming, and networking, helping bring new hardware capabilities into the toolchain.
What you’ll do:
Own and develop a key component of the compiler toolchain.
Design programming-language features that expose hardware capabilities.
Build compiler passes and allocation algorithms for constrained hardware resources.
Improve table and register allocation, investigating failures and optimizing compiler behavior.
Develop low-level tooling, including assembly generation and code generation.
Adapt the toolchain to evolving hardware architectures and performance requirements.
Make technical decisions and collaborate directly with hardware and software engineers.
What we’re looking for:
Experience developing compilers and working with programming-language design.
Strong modern C++ (C++17/20) and systems programming skills.
Practical knowledge of software-defined networking, including data-plane architecture and control-plane design.
Ability to work with hardware constraints and optimize generated code.
Ownership mindset and ability to work independently in a distributed team.
Nice to have: P4, LLVM, MLIR or GCC; packet-processing pipelines and match-action architectures; open-source contributions; experience with advanced AI coding tools.
